NVIDIA + Marvell NVLink Fusion Partnership: What It Means for AI Infrastructure

NVIDIA and Marvell announced a strategic partnership to connect Marvell silicon to the NVIDIA AI factory and AI-RAN ecosystem through NVLink Fusion. Read past the press-release language and this is a meaningful shift in how AI factories will be assembled in the second half of the decade.

What NVLink Fusion Is

NVLink Fusion is NVIDIA’s program for opening NVLink to third-party CPUs, accelerators, and custom silicon. Historically NVLink was a closed protocol connecting NVIDIA GPUs and NVIDIA Grace CPUs. Fusion makes the protocol accessible to qualified partners through a defined chiplet and PHY interface, so a partner’s chip can sit on the same scale-up fabric as Rubin or Blackwell GPUs.

The motivation is simple: hyperscalers and large operators want custom silicon for specific workloads (AI-RAN, network processing, custom accelerators), but they don’t want to give up NVLink’s bandwidth. Fusion lets them have both.

The Marvell Angle

Marvell is one of the largest custom-silicon providers to hyperscalers. It supplies network ASICs, Ethernet switches, optical DSPs, and storage controllers across the data center. By joining NVLink Fusion Marvell can:

• Connect its custom AI accelerators (typically supplied to specific hyperscalers) to NVLink fabrics
• Build AI-RAN reference designs that integrate cleanly with NVIDIA Aerial and Grace
• Offer hyperscale customers chiplets that interoperate with NVIDIA’s scale-up fabric

For Marvell this is access to NVIDIA’s de facto AI infrastructure standard. For NVIDIA it is broader adoption of NVLink as the high-bandwidth fabric of choice.

Why It Matters for AI Factories

Three implications for buyers:

1. NVLink Becomes the Default Scale-Up Standard

If Marvell, MediaTek, Fujitsu, and others all ship NVLink Fusion silicon, NVLink graduates from an NVIDIA-only protocol to the lingua franca of high-bandwidth fabrics. Procurement decisions should factor NVLink Fusion compatibility for any custom silicon you’re evaluating.

2. Heterogeneous Racks Become Realistic

You will see racks combining Rubin GPUs with partner accelerators on the same NVLink fabric. This unlocks specialized configurations, for example, Rubin for compute alongside a Marvell DSP for in-line signal processing in AI-RAN.

3. AI-RAN Gets Closer

5G/6G base stations running AI workloads (AI-RAN) need tight integration of radio DSPs, packet processors, and ML accelerators. Marvell + NVIDIA covers all three. Telcos building open RAN with AI inference at the cell site are the natural early adopters.

What to Watch

Three signals to track over the next 12 months:

• Reference platforms from Supermicro, Foxconn, Wiwynn integrating Marvell accelerators in NVL72-class racks
• Telco design wins for Marvell + NVIDIA AI-RAN platforms
• Other Fusion partners announcing first silicon (the program is open to multiple ASIC providers)

Strategic Implications

The partnership reinforces NVIDIA’s platform strategy. Just as CUDA’s openness to third-party libraries entrenched the software platform, NVLink Fusion’s openness to third-party silicon entrenches the hardware platform. Custom-silicon strategies that bypass NVIDIA entirely become harder to defend; strategies that complement NVIDIA via Fusion become easier to fund.

Designing AI infrastructure that mixes NVIDIA and partner silicon? We help architect heterogeneous AI factory deployments and validate NVLink Fusion integration paths. Contact our team for a consultation.